Lattice Semiconductor
PCI Express User’s Guide
rxtlpu_sd – The core asserts this signal when the ?rst DWORD of the “data” within the TLP is sent out by
the core.
rxtlpu_end – The core indicates the last DWORD of the TLP at the end of the transaction by asserting this
output signal.
un_sup_req – This error signal for Unsupported request is driven high from start to end of the received TLP.
pois_tlp – This error signal for Poisoned TLP is driven high from start to end of the received TLP.
malf_tlp – This error signal for Malformed TLP is driven high at any time from start of the TLP and will be
asserted till the end of the TLP.
Figure 6 shows the signal status for Receive Path User Interface.
PM DLLP Transmission
Apart from generating requests for transmitting TLPs the user interface logic can also initiate a request to transmit
Power Management (PM) DLLPs.
Input signals txpm_dllp_type and tx_pm are used for transmitting PM DLLPs. The user interface logic places a
valid PM DLLP type for transmission in txpm_dllp_type and asserts tx_pm as a strobing signal.
Output signals rxpm_dllp_type and rx_dllp_val are provided to notify the user interface logic about the
received PM DLLP.
Figure 7 shows the signal status for PM DLLP Transmission.
Transaction Layer Implementation
Transmit Path
The Transmit Path acts as a bridge between the Data Link Layer and User Interface in the transmit path. This mod-
ule provides handshake between the core and user logic request to transmit TLPs and PM DLLPs.
In addition, this module performs “Credit Available” calculation by monitoring the types of TLPs transmitted and the
credit values received from the other node through Update FC DLLPs. It accumulates these credit values sepa-
rately for PH, NPH, PD and NPD types and makes them available to the User Interface side based on the selected
packet type as indicated in the input signal pkt_type . Refer to the Credit Available Calculation section for more
details.
Receive Path
This module consists of all logic to provide handshake between the core and user interface for received TLPs. It
checks for errors in the received TLPs and noti?es the user interface side in case of errors like Poisoned TLP,
Unsupported TLP type and Malformed TLP
In addition, credit consumed in received TLP is calculated in this module and Calculated Credit is sent as update
information to Data Link Layer to send Update FC DLLP.
Credit Available Calculation
The core maintains the value of Available Credit for each packet type. User logic can fetch this Credit Available
value from the core by appropriately selecting the packet type in the input signal pkt_type . The core outputs the
Available Credit in the output signal crdt_avail for the selected packet type. Please refer to the Transmit User
Interface section under Timing Diagrams for more detail.
The core stores the Credit Limit (CL) for each packet type that is extracted from the latest UpdateFC DLLPs
received from the other side of the link. The core also calculates the Credit Consumed (CC) value for each packet
type whenever a TLP is transmitted from the core into the PCI Express Link. The Credit Available (CA) value for
8
相关PDF资料
PCM18XH2 PROCESSOR MODULE MPLAB-ICE 2000
PCM18XN0 PROCESSOR MODULE FOR ICE2000
PDA-B-24-615-E-2B1-1-C CIRCUIT BREAKER MAG 1P 15A
PFMF.260.2 PFMF PTC FUSE SMT 2.6A 1812
PFNF.200.2 PFNF PTC FUSE SMT 2A 1206
PFRY.375 PTC-FUSE RADIAL 72 VDC
PFSM.150.33.2 FUSE PTC 8A 15V FST-TRIP SMD
PFUF.150.2 FUSE PTC 3A 6V RESET SMD
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